-55°C to 170°C high linear voltage references circuitry in 0.18ìm CMOS technology

Show simple item record

dc.contributor.author Tzuo-sheng Tsai, J. en_US
dc.contributor.author Chiueh, H. en_US
dc.date.accessioned 2006-12-12T13:47:10Z
dc.date.available 2006-12-12T13:47:10Z
dc.date.issued 2006 en_US
dc.identifier.citation Proceedings of 12th International Workshop on Thermal investigations of ICs, THERMINIC 2006, p. 18-22 en_US
dc.identifier.isbn 2-916187-04-9 en_US
dc.identifier.other handle TIMA 2243/therminic2006_55T170HL18 en_US
dc.identifier.uri http://hdl.handle.net/2042/6540
dc.description.abstract High linear voltage references circuitry are designed and implemented in TSMC 0.18µm CMOS technology. Previous research has proposed the use of MOS transistors operating in the weak inversion region to replace the bipolar devices in conventional PTAT(proportional to absolute temperature) circuits. However such solutions often have linearity problem in high temperature region due to the current leaking devices in modern deep sub micron and nano-scale CMOS technology. The proposed circuit utilized temperature complementation technique on two voltage references, PTAT and IOAT (independent of absolute temperature) references, to enhance the linearity and produce a more stable IOAT voltage reference. Base on the simulation results, the R-squares of both circuitries are better than 0.999 in a considerable wider temperature range from - 55°C to 170°C. Thus, a fully integrated temperature sensor with wider temperature range is designed and easily to integrate to modern system-on-chip designs with minimal efforts. en_US
dc.format.extent 301397 bytes
dc.format.mimetype application/pdf
dc.language.iso EN en_US
dc.publisher TIMA Editions , Grenoble, France en_US
dc.rights http://irevues.inist.fr/utilisation en_US
dc.source Proceedings of 12th International Workshop on Thermal investigations of ICs, THERMINIC 2006, p. 18-22 en_US
dc.subject On-chip temperature sensor, nano-scale CMOS technology, VLSI designs en_US
dc.title -55°C to 170°C high linear voltage references circuitry in 0.18ìm CMOS technology en_US
dc.type Conference proceeding en_US
dc.contributor.affiliation NISRC - National Chiao Tung University [Taiwan] en_US
dc.contributor.affiliation SoC Design Lab, Department of Communication Engineering, College of Electrical and Computer Engineering - Chiao Tung University Hsin-Chu 30050 [Taiwan] en_US


Files in this item

PDF 55T170HL18.pdf 301.3Kb

This item appears in the following Collection(s)

Show simple item record





Advanced Search