DEVELOPMENT OF A PROTOTYPE THERMAL MANAGEMENT SOLUTION FOR 3-D STACKED CHIP ELECTRONICS BY INTERLEAVED SOLID SPREADERS AND SYNTHETIC JETS

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dc.contributor.author Gerty, D. en_US
dc.contributor.author Gerlach, D. W. en_US
dc.contributor.author Joshi, Yogendra K. en_US
dc.contributor.author Glezer, A. en_US
dc.date.accessioned 2008-01-23T09:24:44Z
dc.date.available 2008-01-23T09:24:44Z
dc.date.issued 2007 en_US
dc.identifier.citation 13th International Worshop on THERMal INvestigations of ICs and Systems, Budapest, Hungary 17-19 September 2007, p. 156-161 en_US
dc.identifier.isbn 978-2-35500-002-7 en_US
dc.identifier.uri http://hdl.handle.net/2042/14677
dc.description.abstract A design for cooling 3D stacked chip electronics is proposed using solid heat spreaders of high thermal conductivity interleaved between the chip layers. The spreaders conduct heat to the base of an advanced synthetic jet cooled heat sink. A prior computational study [1] showed that for moderate power dissipations, 5 W in each 27 ? 38 mm layer, a 250 ?m thick copper heat spreader would conduct heat adequately. However, the mismatch in coefficient of thermal expansion between copper and silicon required large holes through the copper layer for electrical vias. The current study investigates the design of a thermal prototype for experimental testing. Each active layer will incorporate a thermal test die to simulate an FPGA and a smaller one to simulate a DRAM (Fig. 2). The spreader layer will be silicon with no via holes. The heat sink will contact only three of the stack sides to allow wirebond connections on the fourth side (Fig. 3). The effect of the power dissipated and the heat transfer coefficient applied to the peripheral surface are studied. In order to remove the heat from the edges of a multi-layer stack and transfer it to the ambient air, a novel active heat sink design has been implemented using a matrix of integrated synthetic jets. In previous synthetic jet heat sink designs, cooling air is entrained upstream of the heat sink and is driven along the length of the fins. In the new design, synthetic jets emanate from the base of the fins so that the induced jets and entrained (cooling) ambient air flow along the fin height. The velocity field of the active heat sink is mapped using particle image velocimetry (PIV). Thermal performance is characterized using a surrogate heater and embedded thermocouple sensors. The thermal performance of identical heat sinks cooled by the two synthetic jet approaches is compared. An improved third heat sink solution is introduced and compared to previous results en_US
dc.format.extent 511270 bytes
dc.format.mimetype application/pdf
dc.language.iso EN en_US
dc.publisher EDA Publishing Association, Grenoble, France en_US
dc.rights http://irevues.inist.fr/utilisation en_US
dc.source 13th International Worshop on THERMal INvestigations of ICs and Systems, Budapest, Hungary 17-19 September 2007, p. 156-161 en_US
dc.subject Thermal management, three dimensional, heat conduction, simulation, IC, integrated circuit, PIV, cellular recirculation, laterally induced flow, base jets en_US
dc.title DEVELOPMENT OF A PROTOTYPE THERMAL MANAGEMENT SOLUTION FOR 3-D STACKED CHIP ELECTRONICS BY INTERLEAVED SOLID SPREADERS AND SYNTHETIC JETS en_US
dc.type Conference proceeding en_US
dc.contributor.affiliation Woodruff School of Mechanical Engineering - Georgia Institute of Technology [US] en_US
dc.contributor.affiliation Woodruff School of Mechanical Engineering - Georgia Institute of Technology [US] en_US
dc.contributor.affiliation Woodruff School of Mechanical Engineering - Georgia Institute of Technology [US] en_US
dc.contributor.affiliation Woodruff School of Mechanical Engineering - Georgia Institute of Technology [US] en_US


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